Homework Problems:

1. (200 pts) Combinational test generation
   1. (20 pts.) Generate test vectors for b17.bench by the PODEM program. Set backtrack limits to 1, 10, 100, 1,000, or more and compare the number of patterns, the fault coverages, CPU runtimes, and actual backtrack numbers generated by running the program. (targeting circuit: b17.bench)
   2. (30 pts.) (Verify ATPG results)Generate test vectors for b17.bench benchmark circuit with collapsed fault list (checkpoint fault list) and total fault list. Then Run the fault simulator on the total fault list with the two sets of generated patterns. Is there any difference? If so, can you explain what happened? (targeting circuit: b17.bench)
   3. (50 pts.) (Podem Implementation) First, trace the ATPG part of the PODEM program and try to understand the implementation of the test generation procedure. Then use c17.bench circuit to demonstrate the podem procedures (by inserting printf or cout). Selected fault list is listed below and you have to exercise most procedures used in the ATPG. It is recommended to use a table for the program outputs to show each step (fault activation, fault propagation, backtrace, forward simulation, backtrack, etc.), and a decision tree will be helpful for viewing the process. (targeting circuit: c17.bench)fault_list
   4. (50 pts.)(ATPG with random patterns) Use a random pattern generator as the first stage of a ATPG system. The random pattern generator stops at either a fixed number of patterns (1000 patterns) or a saturated fault coverage (90%). After the random generator, PODEM will be used to target the remaining undetected faults. Please compare the results with the original PODEM. Note that the random pattern stage and ATPG stage have to be integrated such that you can measure the corresponding CPU times. (targeting circuit: b17.bench, s35932_com.bench, s38417_com.bench, s38584_com.bench)
   5. (50 pts.) (Test generation for bridging faults) Please modify podem to deal with the bridging fault list produced in homework #4-1.-b.. Please verify your results with the fault simulator implemented in homework #5.

Grading:

• Correctness    90%
• Report      10%

Attention:

1. Please just output the original output format of ATPG.
2. Command of d.:

   ./atpg -random_pattern -output [output_pattern] [circuit_name]

3. Command of e.:

   ./atpg -bridging_atpg -output [output_pattern] [circuit_name]