IEE5650: VLSI Testing

Assignment #4   (Due: May. 3, 2019)

Last update: Apr. 11, 2019


Reading:

Homework Problems:

  1. (130 pts) Fault list generation:
    1. (30 pts) Please re-implement the fault generation function with the checkpoint theorem. How much percentage of faults have been collapsed? Please compare the number of faults.
    2. (100 pts) We would like to create a special fault list for bridging faults. To avoid the huge number of all possible faults, we usually use layout to pick adjacent nets for bridging. Since we do not want to create a very complex IFA (inductive fault analysis) framework in this homework, it is assumed that only nets in the same level can have bridging between them. Also nets in one level are ordered (followed by podem's original order). Each net will only have two neighbors according to the ordering. For example, we have an order of nets: n0, n1, n2, n3,...nk. The net n2 will only bridge with n1 and n3 in this model. There are two types of bridge faults between two nodes. For example, (n0, n1, AND) or (n0, n1, OR). Note that each type of bridge fault will happen when the two nodes have opposite values. For example, the bridge fault (n0, n1, AND) will happen when (n0=0, n1=1) and (n0=1, n1=0), and this bridge fault will leads to (n0=n1=0).
      Please create a bridging fault list in the PODEM program according to the description above. Note that you need to create a new fault data structure for the new faults.

Grading:

Attention:

  1. The command for 1.-a. is as follows:

    ./atpg -check_point [circuit_name]

  2. The command for 1.-b. is as follows:

    ./atpg -bridging -output [output_file_name] [circuit_name]